The present invention relates to a multi-level cell (MLC) flash memory device. More particularly, the present invention relates to a method of programming data in a flash memory device where setting a program start voltage depends on a shift path of a threshold voltage in order to improve a program time.
Generally, flash memory is categorized into a NAND flash memory or a NOR flash memory. Here, the NOR flash memory has excellent random access time characteristics because memory cells are independently connected to a bit line and a word line. Whereas, in the NAND flash memory, only one contact is required for one cell string because memory cells are serially connected and so the NAND flash memory has excellent characteristics in view of the degree of integration. Accordingly, the NAND flash memory is generally employed in highly integrated flash memory. A configuration of the NAND flash memory is described in more detail in U.S. Pat. No. 7,193,911, which is incorporated by reference.
Recently, a multi-bit cell for storing a plurality of data in one memory cell has been actively studied for the purpose of increasing the degree of integration of the flash memory.
This memory cell is referred to as a multi-level cell (MLC). Whereas, a memory cell for storing one bit is referred to as a single level cell (SLC).
FIG. 1 is a view illustrating a cell voltage distribution of a multi-level cell for storing data of 2 bits. A memory cell for storing data of 2 bits has four cell distributions, i.e. a cell distribution corresponding to data [11], a cell distribution corresponding to data [10], a cell distribution corresponding to data [00] and a cell distribution corresponding to data [01]. When programming the least significant bit (LSB), the threshold voltage may be shifted from state [11] to state [10] as shown by an arrow 1 in FIG. 1. When programming the most significant bit (MSB), the threshold voltage may be shifted from the state [11] to the state [00] or [01], as shown by arrows 2 in FIG. 1.
Arrows 1, 2, and 3 of FIG. 1 illustrate a plurality of program operations performed on a group of MLCs, e.g., a page of MLCs. The page has first, second, and third groups of MLCs, where each group has one or more MLCs. A LSB program is performed on the first group of MLCs to place the first group in the state [10] (see arrow 1). A first MSB program is performed on the second group of MLCs to place the second group in the state [00] (see arrow 2). The second group may be the same or a subset of the first group. A second MSB program is performed on a third group of MLCs to place the third group in the state [01] (see arrow 3).
In the case that the flash memory device programs data to the MLC, the flash memory device may minimize a program time by optimizing a program voltage Vpgm so as to shift a threshold voltage of each of the cells as shown in FIG. 1. A threshold voltage of MLC is increased by performing the LSB program once and performing the MSB program twice, as explained above.
FIG. 2A is a view illustrating a change of a threshold voltage of a cell in the LSB program of FIG. 1. A program voltage Vpgm in the form of a pulse is supplied for performing the LSB program. The threshold voltage of the cell is changed, thereby programming the data therein in accordance with the program voltage Vpgm. The program voltage Vpgm is applied in accordance with an increment step pulse program (ISPP) method where the program voltage Vpgm is increased in an increment of 0.2V from a first voltage (a) which is a start voltage for the LSB program operation.
In addition, the threshold voltage of the cells is augmented along a path P1 by applying the ISPP method. A program verification checks the threshold voltage of the cells to determine if the cells have been programmed properly to a first state associated with a first verifying voltage PV1. If the threshold voltage of the cells is determined to be greater than the first verifying voltage PV1, then the cells are deemed to have been programmed properly to the first state, e.g., [10].
FIG. 2B is a view illustrating a change of a threshold voltage of the cell in the MSB program in connection with FIG. 1. The threshold voltage of the cell may be shifted as shown in FIG. 1 (see arrows 2 and 3) when the first and second MSB program operations are performed. Different program voltages Vpgm are applied for the first and second MSB program operations. The ISPP method is applied using the start voltage that is a second voltage (b) for the first MSB program operation.
Accordingly, the threshold voltage of the cell is increased beyond the second verifying voltage PV2 along a path P2. Additionally, the threshold voltage of the cell is augmented up to the third verifying voltage PV3 along a path P3.
When programming using the P2 path, the voltage increment (e.g., 0.2V) of the ISPP method has to be sufficiently small to reach the second verifying voltage PV2 without over-shooting beyond the third verifying voltage PV3. However, the use of a small voltage increment means that the program time would be longer and more power would be used to reach the third verifying voltage via the P3 path.